1. Field of the Invention
This invention pertains to the field of flat panel displays and more specifically to the construction of an electroluminescent flat panel display using a minimum of driving circuitry.
2. Description of the Prior Art
Flat panel displays are useful for the display of alphanumeric and graphic information in applications including computer readouts, plotting and tracking displays, and the like. Such displays are lighter in weight than CRT displays and due to their flat panel construction may be placed in consoles having a more limited depth than that required for CRTs. Most flat panel displays utilize an array of small discrete electro-sensitive areas known as pixels that either generate light or reflect light in response to an electrical signal. The pixels may comprise a.c or d.c. electroluminescent materials, light emitting diodes, liquid crystals, etc., and may be addressed either individually, or in a matrix array with half select techniques.
Displays of practical size, however, require a large number of addressing circuits even when organized in a matrix array, thereby significantly increasing the cost and complexity of the resulting display system. For example, a flat panel display containing 10,000 pixels in a 100.times.100 row and column configuration would require 10,000 individual circuits for each pixel in a direct addressing system. Most matrix organized flat panel displays, however, utilize a row and column half select addressing system in which the pixels in an individual row have a lead in common, and the pixels in each column also have a lead in common. Thus, by addressing the appropriate column and row, individual pixels may be energized. For the previous example of a 100.times.100 matrix display, 200 addressing circuits would be required, one hundred for the rows and one hundred for the columns. It is, however, desirable to reduce this number further.
Applicant's copending application, Ser. No. 317,688, filed Nov. 2, 1981, now U.S. Pat. No. 4,467,325, assigned to the assignee of the present invention, describes an apparatus that provides a greatly reduced number of addressing circuits for use with display media that have a steep brightness voltage threshold, such as, for example, electroluminescent materials. In this addressing structure the display panel is coupled to arrays of photoresistors deposited along two adjacent edges of the panel and illuminated by scanning gas discharge light sources which are contained in separate envelopes. Relatively few drive circuits are required for this scheme, resulting in substantial cost savings. The cost, however, of the display panel itself, consisting of electroluminescent and photoconducting materials deposited on the same substrate, can be fairly high if the yields for the electroluminescent and photoconducting material fabrication is low.
It is important that every photoresistor in this system is a fully working element since one defective device may cause a whole display line of a matrix display, namely either a row or a column, to be non-functional. Depending upon manufacturing techniques, the yield of photoresistor arrays in which every element is working may be low. If the photoconducting devices are fabricated directly onto the electroluminescent panel substrate, a low yield for fully functional photoresistor arrays represents a high expense, since many substrates will either be discarded or cleaned for reuse. Also, there may be incompatibilities in the processing techniques used for both the photoconductor and electroluminescent material and furthermore the relatively large size of substrates which must include both electroluminescent and photoconducting materials may result in a smaller throughput for evaporators or annealing ovens, thus increasing fabrication costs.
The present invention provides a structure permitting the electroluminescent and photoconductive layers to be processed on different substrates and interconnected thereafter. Thus, a low yield of the fabricated photoresistors will not require discarding of the electroluminescent panels. Additionally, by separating the elements, a greater fabrication throughput is possible and there is no possibility of a lack of compatibility in the processing techniques used for the electroluminescent and photoconductor fabrication.